Determining the satisfiability of first-order formulas modulo background theories, known as the Satisfiability Modulo Theories (SMT) problem, has proved to be an enabling technology for verification, synthesis, test generation, compiler optimization, scheduling, and other areas. The success of SMT techniques depends on the development of both domain-specific decision procedures for each background theory (e.g., linear arithmetic, the theory of arrays, or the theory of bit-vectors) and combination methods that allow one to obtain more versatile SMT tools, usually leveraging Boolean satisfiability (SAT) solvers. These ingredients together make SMT techniques well-suited for use in larger automated reasoning and verification efforts.
Aims and Scope
The goal of the SMT Workshop is to bring together both researchers and users of SMT technology and provide them with a forum for presenting and discussing both new theoretical ideas and implementation and evaluation techniques. Topics of the workshop include, but are not limited to:
##Decision procedures and theories of interest
##Combinations of decision procedures
##Novel implementation techniques
##Benchmarks and evaluation methodologies
##Applications and case studies
Papers on pragmatic aspects of implementing and using SMT tools, as well as novel applications of SMT, are especially encouraged.
In addition to contributed papers and presentations, the programme of the workshop will include invited presentations, discussions around the SMT-LIB language, and the SMT competition.