Implementation of autocorrelation algorithm in VHDL for UVP instrumentation
Sprache des Titels:
Englisch
Original Buchtitel:
Proceedings of ISUD2023
Original Kurzfassung:
Ultrasound velocity profiler (UVP) instrument can be applied in a variety of applications from industrial (oil, food
processing, etc.), to environmental (hydrology, sewer, etc.) to energy (nuclear, hydropower plants, etc.). UVP
equipment measures flow velocity using an autocorrelation method or phase-shift method. This method is
established on the phase estimation for sequential ultrasonic pulses of a complex demodulated signal. The present
work aims to implement in VHSIC Hardware Description Language (VHDL) a velocity estimation algorithm based on the autocorrelation method. First, the method was implemented in MATLAB® to be used as a reference. Then, the algorithm was implemented in VHDL in a MAX10 Field Programmable Gate-Array (FPGA) using the DE10- Lite Board from Terasic. The VHDL implementation process digitalized data using IEEE 754 standard floatingpoint number representation with single precision. Validation was performed using previous data acquired from a one-phase horizontal pipe flow. The algorithm implemented in VHDL presented a relative estimated velocity error below 0.00003%, consuming 4,623 total logic elements and 28 embedded multiplier elements from MAX10 FPGA.
Forschungs-