Accurate On-Chip Linearity Monitoring With Low-Quality Test Signal Generation
Sprache des Titels:
Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2023)
State-of-the-art radar sensors for automotive driving applications have to fulfill stringent requirements on reliability and functional safety. Therefore, monitoring concepts that cover various sensor parameters such as gain, phase, noise figure or phase-noise became an active field of research. Another essential sensor parameter is the receiver's linearity. A major design challenge for on-chip linearity testing is the generation of a spectrally pure test signal. In the past, this was mainly tackled by sophisticated analog design of the test signal generator (TSG), such that the overall complexity of the test circuitry was increased. In this work, we propose a monitoring concept that eliminates the need for a pure test signal. This enables accurate on-chip linearity testing by the use of a low-cost TSG. With an imprecise test signal, accurate testing can be achieved by exploiting the test signal generator's repeatability. By means that instead of injecting a spectrally pure test signal into the device under test (DUT), an imprecise test signal is injected multiple times, but each time scaled with a different properly chosen factor. With this, all impairments affecting the test signal before the analog scaling can be separated from nonlinear effects after the scaling by digital signal processing. Thus, the requirements on the analog test circuitry are heavily relaxed. Ultimately, we proof our concept by simulation as well as measurement results.