Zaid Al-Wardi, Robert Wille, Rolf Drechsler,
"Re-writing HDL Descriptions for Line-aware Synthesis of Reversible Circuits"
, in ISMVL: International Symposium on Multiple-Valued Logic (ISMVL), Seite(n) 31-36, 2016, ISBN: 978-1-4673-9488-8
Re-writing HDL Descriptions for Line-aware Synthesis of Reversible Circuits
Sprache des Titels:
International Symposium on Multiple-Valued Logic (ISMVL)
Reversible computing is a promising research field
due to its applications in several emerging technologies. Accord-
ingly, several approaches for the design of reversible circuits
have been introduced ? including solutions realizing functionality
provided in terms of hardware description languages. Their main
drawback is, however, that they require a substantial amount
of additional circuit lines. While some solutions addressing this
problem have been proposed in the past, the contribution of
the respectively given HDL code to this drawback has hardly
been considered yet. In this work, we are considering this
problem from this angle: Observations have been conducted
which, eventually, led to a set of re-writing rules for a line-aware synthesis of reversible circuits from HDL descriptions.
Case studies show the benefits of these rules - in total, substantial
reductions in the number of circuit lines have been observed.