Analysis of a Two-Bit Frequency Discriminator in an All Digital Phase Locked Loop for RF-Modulation and RF-Frequency
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Proceedings European Conference on Wireless Technology
A key issue in pushing the digitization of Phase Locked Loops (PLLs) for RF transmitters is the realization of proper phase/frequency detectors in the digital domain. This paper presents a simulative analysis of the properties for and re-quirements of a two-bit frequency discriminator used for digitiza-tion of frequency in All Digital PLLs (ADPLLs) with two-point modulation. Effects due to reference clock jitter in one-bit and two-bit frequency discriminators are treated. Furthermore, meas-urement results for the synthesis mode of the ADPLL used in multi-mode capable terminal are given.